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Wiki source code of MTCA ADCs

Version 8.1 by sndueste on 2019/10/02 15:28
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sndueste 7.1 1 Content:
sendels 2.1 2
sndueste 6.1 3
sndueste 7.1 4
sndueste 6.1 5 {{toc/}}
6
sndueste 8.1 7 ----
8
sndueste 6.1 9 = General info =
10
sendels 2.1 11 * [[ADQ412 server description~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:https://ttfinfo.desy.de/FLASHWiki/Wiki.jsp?page=SPdevicesDMA%20ADQ||shape="rect"]]
12 * [[more ADC server descriptions~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:https://ttfinfo.desy.de/DOOCSWiki/Wiki.jsp#section-C_2B_2B+Server+Interface-D_ADCscope?page=C%2B%2B%20Server%20Interface||shape="rect"]]
13 * [[Description of the DAQ properties related to the ADCs~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:https://ttfinfo.desy.de/DOOCSWiki/Wiki.jsp#section-C_2B_2B+Server+Interface-DaqfedConfiguration.?page=C%2B%2B%20Server%20Interface||shape="rect"]]
sendels 4.1 14 * [[ a collection of usefull things related to the OPIS ADCs>>doc:FLASH.OPIS ADC related things]]
sendels 2.1 15
16 \\
17
sndueste 6.1 18 = Our ADC cards =
sendels 2.1 19
sndueste 6.1 20 == GHz ADCs: SP-Devices ADQ412AC ==
sendels 2.1 21
22 We have ADQ412AC-4G-MTCA digitizer cards for the experiment crates (Exp1, Exp2 and FL2Exp1):
sendels 4.1 23 [[ADQ412_datasheet.pdf>>attach:10-0494_C_ADQ412_datasheet.pdf]] ( [[new version>>attach:10-0494-adq412_datasheet.pdf]], [[sampling rates table>>attach:Clocking_AppNote.pdf]])
sendels 2.1 24 The cards are connected via Patch panels to the Experimental endstations.
25
26 \\
27
sendels 4.1 28 * **NOTE: between ADC and Patch panel we have installed an [[EMP protector>>attach:EMP_protector.pdf]] and an additional 1dB attenuator**
sendels 2.1 29 * for the influence of the Patch cable and the EMP protector see also [[this logbook entry~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:http://ttfinfo.desy.de/ExpHallelog/show.jsp?dir=/2016/27/08.07&pos=2016-07-08T17:41:07||shape="rect"]]
30
31 \\
32
sendels 3.1 33 (% class="wrapped" %)
sendels 2.1 34 |(((
35 Impedance AC
36 )))|(((
37 50 OHM
38 )))
39 |(((
40 Input voltage range
41 )))|=(((
42 800 mV pp!!!!!!!!!!!!!!!!
43 )))
44 |(((
45 Digitizer resolution
46 )))|(((
47 12 bit
48 )))
49
50 4 CHANNELS MODE
51
sendels 3.1 52 (% class="wrapped" %)
sendels 2.1 53 |(((
54 Sampling rate
55 )))|(((
56 2
57 )))|(((
58 GSPS
59 )))
60 |(((
61 Analog bandwidth
62 )))|(((
63 2
64 )))|(((
65 GHz
66 )))
67
68 2 CHANNELS MODE
69
sendels 3.1 70 (% class="wrapped" %)
sendels 2.1 71 |(((
72 Sampling rate
73 )))|(((
74 4
75 )))|(((
76 GSPS
77 )))
78 |(((
79 Analog bandwidth
80 )))|(((
81 1.3
82 )))|(((
83 GHz
84 )))
85
86 \\
87
88 ===== ADC and DOOCS / DAQ =====
89
90 The HDF5 names for the ADC traces are depending on the beamline :
91 \\PG Beamline:
92 {{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH00/TD{{/code}}
93 {{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH01/TD{{/code}}
94 {{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH02/TD{{/code}}
95 {{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH03/TD{{/code}}
96
97 BL Beamlines:
98 {{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH00/TD{{/code}}
99 {{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH01/TD{{/code}}
100 {{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH02/TD{{/code}}
101 {{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH03/TD{{/code}}
102 \\{{code language="none"}}/FL1/Experiment/BL2/ADQ412 GHz ADC/CH00/TD{{/code}}
103 {{code language="none"}}/FL1/Experiment/BL2/ADQ412 GHz ADC/CH01/TD{{/code}}
104 \\{{code language="none"}}/FL1/Experiment/BL3/ADQ412 GHz ADC/CH02/TD{{/code}}
105 {{code language="none"}}/FL1/Experiment/BL3/ADQ412 GHz ADC/CH03/TD{{/code}}
106
107 DOOCS prop : {{code language="none"}}FLASH.FEL/ADC.ADQ.PG/EXP1.CH00/CH00.TD  or CH00.DAQ.TD{{/code}}
108 here the {{code language="none"}}CH00.TD{{/code}} is the full ADC trace as it is sampled ( typically several 100.000 samples per pulse train) while the {{code language="none"}}CH00.DAQ.TD{{/code}} trace only has the number of samples which are sent to the DAQ OR if //grouping// is actvated the {{code language="none"}}CH00.DAQ.TD{{/code}} contins only the grouped spectra. To read the ADC trace with an online analysis program the {{code language="none"}}CH00.DAQ.TD{{/code}} is preferable to use ...
109 DAQ channel: {{code language="none"}}FLASH.FEL/ADC.ADQ.PG/EXP1.CH00{{/code}}
110
111 in addition there are also additional parameters saved like:
112
113 * sample frequency (in MHz)
114 * error (state)
115 * offset
116
117 \\
118
sndueste 6.1 119 == Amplifiers for the GHZ ADCs ==
sendels 2.1 120
sndueste 6.1 121 * **we can offer [[ Phillips scientific Model 6954>>attach:6954ds.pdf]] amplifiers** to either amplify small signals or to decouple setups which may deliver voltage peaks fro the ADCs.
122 * The available ADCs 5x, 10x, 20 x 50x and 100x
123 * The ADCs can be borrowed from Markus Braune
124 * The Amplifiers fot perfectly to the dynamic range of the GHz ADCs - here a  [[ test of the Phillips scientific amplifier>>attach:Model_6954_Amplifier_Report.pdf]]
125
126 \\
127
128 == 108 MHz ADCs:  Struck SIS8300-L2D ==
129
sendels 2.1 130 There is one in each of the MTCAs in the hall: MTCA-EXP1 at PG/BL1, the other at BL2 and BL3.
131
132 They are 16 bit, 10 channel, 125 MS/s ADCs.
133
134 \\
135
sendels 4.1 136 * [[User Manual SIS8300-L2 ADC ACM>>attach:sis8300l2-m-x009-1-v101.pdf]]
137 * [[User Manual SIS8900 RTM>>attach:sis8900-m-1-1-v104.pdf]]
sendels 2.1 138
139 50 Ohm input impedance, -1 V,...,+1 V default input range, analog signals can be routed to AC and DC input stage. The coupling is DC via op-amp (switching to AC transformer involves resoldering of SMD solder bridges).
140
141 Here is a trace of the first signal, a 1 MHz trigger connected from the x2timer board in the same MTCA:
142
sendels 4.1 143 [[~[~[image:url:http://hasfweb.desy.de/pub/Setup/MtcaAdc/adc_mhz.jpg~|~|alt="adc_mhz.jpg" width="550" height="500"~]~]>>attach:adc_mhz.jpg]]
sendels 2.1 144
145 \\
146
sndueste 6.1 147 == Pulse energy server: Using the Struck SIS8300-L2D to detect only integrated values of pulses ==
sendels 2.1 148
149 FS-LA (Falko Peters) programmed a pulse detection server that automatically detects peaks in the signel and integrates the samples around the peak. <\br> things to set:
150
151 * Peak height: from what signal on (incounts) is the signal to be counted as peak
152 * pre and post peak integration time: how much ns to be integrated before and after the peak sample that are taken into account for the peak
153 * pre and post peak noise time: before and after the samples that are taken for the actual signal these samples are used as background ( they also can be used to define the "deadtime" of the detector before it searches for new peaks.
154
sendels 4.1 155 [[~[~[image:url:http://hasfweb.desy.de/pub/Setup/MtcaAdc/pulse_energy_server.jpg~|~|alt="pulse_energy_server.jpg" width="400" height="300"~]~]>>attach:pulse_energy_server.jpg]]
sendels 2.1 156
157 \\