Changes for page MTCA ADCs
Last modified by sndueste on 2024/07/08 09:50
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... ... @@ -1,179 +1,0 @@ 1 -Content: 2 - 3 - 4 - 5 -{{toc/}} 6 - 7 ----- 8 - 9 -= General info = 10 - 11 -* [[ADQ412 server description~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:https://ttfinfo.desy.de/FLASHWiki/Wiki.jsp?page=SPdevicesDMA%20ADQ||shape="rect"]] 12 -* [[more ADC server descriptions~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:https://ttfinfo.desy.de/DOOCSWiki/Wiki.jsp#section-C_2B_2B+Server+Interface-D_ADCscope?page=C%2B%2B%20Server%20Interface||shape="rect"]] 13 -* [[Description of the DAQ properties related to the ADCs~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:https://ttfinfo.desy.de/DOOCSWiki/Wiki.jsp#section-C_2B_2B+Server+Interface-DaqfedConfiguration.?page=C%2B%2B%20Server%20Interface||shape="rect"]] 14 -* [[ a collection of usefull things related to the OPIS ADCs>>doc:FLASH.OPIS ADC related things]] 15 - 16 -\\ 17 - 18 -= Our ADC cards = 19 - 20 -== GHz ADCs: SP-Devices ADQ412AC == 21 - 22 -We have ADQ412AC-4G-MTCA digitizer cards for the experiment crates (Exp1, Exp2 and FL2Exp1): 23 -[[ADQ412_datasheet.pdf>>attach:10-0494_C_ADQ412_datasheet.pdf]] ( [[new version>>attach:10-0494-adq412_datasheet.pdf]], [[sampling rates table>>attach:Clocking_AppNote.pdf]]) 24 -The cards are connected via Patch panels to the Experimental endstations and can be operated with a jddd panel: 25 - 26 -[[image:attach:image2019-10-21_15-21-23.png||width="800"]] 27 - 28 -\\ 29 - 30 -\\ 31 - 32 -* **NOTE: between ADC and Patch panel we have installed an [[EMP protector>>attach:EMP_protector.pdf]] and an additional 1dB attenuator** 33 -* for the influence of the Patch cable and the EMP protector see also [[this logbook entry~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:http://ttfinfo.desy.de/ExpHallelog/show.jsp?dir=/2016/27/08.07&pos=2016-07-08T17:41:07||shape="rect"]] 34 - 35 -\\ 36 - 37 -(% class="wrapped" %) 38 -|((( 39 -Impedance AC 40 -)))|((( 41 -50 OHM 42 -))) 43 -|((( 44 -Input voltage range 45 -)))|=((( 46 -800 mV pp!!!!!!!!!!!!!!!! 47 -))) 48 -|((( 49 -Digitizer resolution 50 -)))|((( 51 -12 bit 52 -))) 53 - 54 -4 CHANNELS MODE 55 - 56 -(% class="wrapped" %) 57 -|((( 58 -Sampling rate 59 -)))|((( 60 -2 * 61 -)))|((( 62 -GSPS 63 -))) 64 -|((( 65 -Analog bandwidth 66 -)))|((( 67 -2 68 -)))|((( 69 -GHz 70 -))) 71 - 72 -2 CHANNELS MODE 73 - 74 -(% class="wrapped" %) 75 -|((( 76 -Sampling rate 77 -)))|((( 78 -4 * 79 -)))|((( 80 -GSPS 81 -))) 82 -|((( 83 -Analog bandwidth 84 -)))|((( 85 -1.3 86 -)))|((( 87 -GHz 88 -))) 89 - 90 - ~* note that the sample rate is NOT locked to the FLASH repetition rate ! Thus there is a not integer number of samples between FLASH pulses. The sample rate also differs slightly from ADC card to ADC card. The rough spacing is **1993.846** samples between 2 pulses at 1 MHz for details ask the local contact. 91 - 92 -\\ 93 - 94 -===== ADC and DOOCS / DAQ ===== 95 - 96 -The HDF5 names for the ADC traces are depending on the beamline : 97 -\\PG Beamline: 98 -{{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH00/TD{{/code}} 99 -{{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH01/TD{{/code}} 100 -{{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH02/TD{{/code}} 101 -{{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH03/TD{{/code}} 102 - 103 -BL Beamlines: 104 -{{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH00/TD{{/code}} 105 -{{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH01/TD{{/code}} 106 -{{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH02/TD{{/code}} 107 -{{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH03/TD{{/code}} 108 -\\{{code language="none"}}/FL1/Experiment/BL2/ADQ412 GHz ADC/CH00/TD{{/code}} 109 -{{code language="none"}}/FL1/Experiment/BL2/ADQ412 GHz ADC/CH01/TD{{/code}} 110 -\\{{code language="none"}}/FL1/Experiment/BL3/ADQ412 GHz ADC/CH02/TD{{/code}} 111 -{{code language="none"}}/FL1/Experiment/BL3/ADQ412 GHz ADC/CH03/TD{{/code}} 112 - 113 -DOOCS prop : {{code language="none"}}FLASH.FEL/ADC.ADQ.PG/EXP1.CH00/CH00.TD or CH00.DAQ.TD{{/code}} 114 -here the {{code language="none"}}CH00.TD{{/code}} is the full ADC trace as it is sampled ( typically several 100.000 samples per pulse train) while the {{code language="none"}}CH00.DAQ.TD{{/code}} trace only has the number of samples which are sent to the DAQ OR if //grouping// is actvated the {{code language="none"}}CH00.DAQ.TD{{/code}} contins only the grouped spectra. To read the ADC trace with an online analysis program the {{code language="none"}}CH00.DAQ.TD{{/code}} is preferable to use ... 115 -DAQ channel: {{code language="none"}}FLASH.FEL/ADC.ADQ.PG/EXP1.CH00{{/code}} 116 - 117 -in addition there are also additional parameters saved like: 118 - 119 -* sample frequency (in MHz) 120 -* error (state) 121 -* offset 122 - 123 -\\ 124 - 125 -== Amplifiers for the GHZ ADCs == 126 - 127 -* **we can offer [[ Phillips scientific Model 6954>>attach:6954ds.pdf]] amplifiers** to either amplify small signals or to decouple setups which may deliver voltage peaks fro the ADCs. 128 -* The available ADCs 5x, 10x, 20 x 50x and 100x 129 -* The ADCs can be borrowed from Markus Braune 130 -* The Amplifiers fot perfectly to the dynamic range of the GHz ADCs - here a [[ test of the Phillips scientific amplifier>>attach:Model_6954_Amplifier_Report.pdf]] 131 - 132 -\\ 133 - 134 -== 108 MHz ADCs: Struck SIS8300-L2D == 135 - 136 -There is one in each of the MTCAs in the hall: MTCA-EXP1 at PG/BL1, the other at BL2 and BL3. 137 - 138 -They are 16 bit, 10 channel, 125 MS/s ADCs. 139 - 140 -\\ 141 - 142 -* [[User Manual SIS8300-L2 ADC ACM>>attach:sis8300l2-m-x009-1-v101.pdf]] 143 -* [[User Manual SIS8900 RTM>>attach:sis8900-m-1-1-v104.pdf]] 144 - 145 -50 Ohm input impedance, -1 V,...,+1 V default input range, analog signals can be routed to AC and DC input stage. The coupling is DC via op-amp (switching to AC transformer involves resoldering of SMD solder bridges). 146 - 147 -Here is a trace of the first signal, a 1 MHz trigger connected from the x2timer board in the same MTCA: 148 - 149 -[[~[~[image:url:http://hasfweb.desy.de/pub/Setup/MtcaAdc/adc_mhz.jpg~|~|alt="adc_mhz.jpg" width="550" height="500"~]~]>>attach:adc_mhz.jpg]] 150 - 151 -\\ 152 - 153 -== Pulse energy server: Using the Struck SIS8300-L2D to detect only integrated values of pulses == 154 - 155 -FS-LA (Falko Peters) programmed a pulse detection server that automatically detects peaks in the signal and integrates the samples around the peak. 156 - 157 -Things to set: 158 - 159 -* Min peak height: threshold fro which on some signal is considered to be a peak. The actual peak is then determined as the maximum of the counts after the threshold 160 -* pre and post peak integration time: how much ns to be integrated before and after the peak sample that are taken into account for the peak 161 -* pre and post peak noise time: before and after the samples that are taken for the actual signal these samples are used as background ( they also can be used to define the "deadtime" of the detector before it searches for new peaks. 162 - 163 -\\ 164 - 165 -[[~[~[image:url:http://hasfweb.desy.de/pub/Setup/MtcaAdc/pulse_energy_server.jpg~|~|alt="pulse_energy_server.jpg" height="400"~]~]>>attach:pulse_energy_server.jpg]] [[image:attach:image2019-11-18_17-9-7.png||height="400"]] 166 - 167 -\\ 168 - 169 - jddd server panel Definition of the parameters 170 - 171 -\\ 172 - 173 -\\ 174 - 175 -\\ 176 - 177 -\\ 178 - 179 -\\