Wiki source code of MTCA ADCs

Version 15.1 by sndueste on 2020/01/07 14:37
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sndueste 7.1 1 Content:
sendels 2.1 2
sndueste 6.1 3
sndueste 7.1 4
sndueste 14.1 5 {{toc minLevel="2"/}}
sndueste 6.1 6
sndueste 8.1 7 ----
8
sndueste 6.1 9 = Our ADC cards =
sendels 2.1 10
sndueste 6.1 11 == GHz ADCs: SP-Devices ADQ412AC ==
sendels 2.1 12
13 We have ADQ412AC-4G-MTCA digitizer cards for the experiment crates (Exp1, Exp2 and FL2Exp1):
sendels 4.1 14 [[ADQ412_datasheet.pdf>>attach:10-0494_C_ADQ412_datasheet.pdf]] ( [[new version>>attach:10-0494-adq412_datasheet.pdf]], [[sampling rates table>>attach:Clocking_AppNote.pdf]])
sndueste 9.1 15 The cards are connected via Patch panels to the Experimental endstations and can be operated with a jddd panel:
sendels 2.1 16
sndueste 9.1 17 [[image:attach:image2019-10-21_15-21-23.png||width="800"]]
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sendels 2.1 19 \\
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sndueste 9.1 21 \\
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sendels 4.1 23 * **NOTE: between ADC and Patch panel we have installed an [[EMP protector>>attach:EMP_protector.pdf]] and an additional 1dB attenuator**
sendels 2.1 24 * for the influence of the Patch cable and the EMP protector see also [[this logbook entry~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:http://ttfinfo.desy.de/ExpHallelog/show.jsp?dir=/2016/27/08.07&pos=2016-07-08T17:41:07||shape="rect"]]
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26 \\
27
sendels 3.1 28 (% class="wrapped" %)
sendels 2.1 29 |(((
30 Impedance AC
31 )))|(((
32 50 OHM
33 )))
34 |(((
35 Input voltage range
36 )))|=(((
37 800 mV pp!!!!!!!!!!!!!!!!
38 )))
39 |(((
40 Digitizer resolution
41 )))|(((
42 12 bit
43 )))
44
45 4 CHANNELS MODE
46
sendels 3.1 47 (% class="wrapped" %)
sendels 2.1 48 |(((
49 Sampling rate
50 )))|(((
sndueste 10.1 51 2 *
sendels 2.1 52 )))|(((
53 GSPS
54 )))
55 |(((
56 Analog bandwidth
57 )))|(((
58 2
59 )))|(((
60 GHz
61 )))
62
63 2 CHANNELS MODE
64
sendels 3.1 65 (% class="wrapped" %)
sendels 2.1 66 |(((
67 Sampling rate
68 )))|(((
sndueste 10.1 69 4 *
sendels 2.1 70 )))|(((
71 GSPS
72 )))
73 |(((
74 Analog bandwidth
75 )))|(((
76 1.3
77 )))|(((
78 GHz
79 )))
80
sndueste 10.1 81 ~* note that the sample rate is NOT locked to the FLASH repetition rate ! Thus there is a not integer number of samples between FLASH pulses. The sample rate also differs slightly from ADC card  to ADC card. The rough spacing is **1993.846** samples between 2 pulses at 1 MHz for details ask the local contact.
82
sendels 2.1 83 \\
84
85 ===== ADC and DOOCS / DAQ =====
86
87 The HDF5 names for the ADC traces are depending on the beamline :
88 \\PG Beamline:
89 {{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH00/TD{{/code}}
90 {{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH01/TD{{/code}}
91 {{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH02/TD{{/code}}
92 {{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH03/TD{{/code}}
93
94 BL Beamlines:
95 {{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH00/TD{{/code}}
96 {{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH01/TD{{/code}}
97 {{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH02/TD{{/code}}
98 {{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH03/TD{{/code}}
99 \\{{code language="none"}}/FL1/Experiment/BL2/ADQ412 GHz ADC/CH00/TD{{/code}}
100 {{code language="none"}}/FL1/Experiment/BL2/ADQ412 GHz ADC/CH01/TD{{/code}}
101 \\{{code language="none"}}/FL1/Experiment/BL3/ADQ412 GHz ADC/CH02/TD{{/code}}
102 {{code language="none"}}/FL1/Experiment/BL3/ADQ412 GHz ADC/CH03/TD{{/code}}
103
sndueste 15.1 104 and at FLASH2
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106
107 \\\\\\\\{{code language="none"}}FL24:/FL2/Experiment/MTCA-EXP1/ADQ412 GHz ADC/CH00/TD/FL2/Experiment/MTCA-EXP1/ADQ412 GHz ADC/CH01/TD/FL2/Experiment/MTCA-EXP1/ADQ412 GHz ADC/CH02/TD/FL2/Experiment/MTCA-EXP1/ADQ412 GHz ADC/CH03/TD{{/code}}
108
109 \\
110
sendels 2.1 111 DOOCS prop : {{code language="none"}}FLASH.FEL/ADC.ADQ.PG/EXP1.CH00/CH00.TD  or CH00.DAQ.TD{{/code}}
112 here the {{code language="none"}}CH00.TD{{/code}} is the full ADC trace as it is sampled ( typically several 100.000 samples per pulse train) while the {{code language="none"}}CH00.DAQ.TD{{/code}} trace only has the number of samples which are sent to the DAQ OR if //grouping// is actvated the {{code language="none"}}CH00.DAQ.TD{{/code}} contins only the grouped spectra. To read the ADC trace with an online analysis program the {{code language="none"}}CH00.DAQ.TD{{/code}} is preferable to use ...
113 DAQ channel: {{code language="none"}}FLASH.FEL/ADC.ADQ.PG/EXP1.CH00{{/code}}
114
115 in addition there are also additional parameters saved like:
116
117 * sample frequency (in MHz)
118 * error (state)
119 * offset
120
121 \\
122
sndueste 6.1 123 == Amplifiers for the GHZ ADCs ==
sendels 2.1 124
sndueste 6.1 125 * **we can offer [[ Phillips scientific Model 6954>>attach:6954ds.pdf]] amplifiers** to either amplify small signals or to decouple setups which may deliver voltage peaks fro the ADCs.
126 * The available ADCs 5x, 10x, 20 x 50x and 100x
127 * The ADCs can be borrowed from Markus Braune
128 * The Amplifiers fot perfectly to the dynamic range of the GHz ADCs - here a  [[ test of the Phillips scientific amplifier>>attach:Model_6954_Amplifier_Report.pdf]]
129
130 \\
131
132 == 108 MHz ADCs:  Struck SIS8300-L2D ==
133
sendels 2.1 134 There is one in each of the MTCAs in the hall: MTCA-EXP1 at PG/BL1, the other at BL2 and BL3.
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136 They are 16 bit, 10 channel, 125 MS/s ADCs.
137
138 \\
139
sendels 4.1 140 * [[User Manual SIS8300-L2 ADC ACM>>attach:sis8300l2-m-x009-1-v101.pdf]]
141 * [[User Manual SIS8900 RTM>>attach:sis8900-m-1-1-v104.pdf]]
sendels 2.1 142
143 50 Ohm input impedance, -1 V,...,+1 V default input range, analog signals can be routed to AC and DC input stage. The coupling is DC via op-amp (switching to AC transformer involves resoldering of SMD solder bridges).
144
145 Here is a trace of the first signal, a 1 MHz trigger connected from the x2timer board in the same MTCA:
146
sendels 4.1 147 [[~[~[image:url:http://hasfweb.desy.de/pub/Setup/MtcaAdc/adc_mhz.jpg~|~|alt="adc_mhz.jpg" width="550" height="500"~]~]>>attach:adc_mhz.jpg]]
sendels 2.1 148
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150
sndueste 6.1 151 == Pulse energy server: Using the Struck SIS8300-L2D to detect only integrated values of pulses ==
sendels 2.1 152
sndueste 12.1 153 FS-LA (Falko Peters) programmed a pulse detection server that automatically detects peaks in the signal and integrates the samples around the peak.
sendels 2.1 154
sndueste 12.1 155 Things to set:
156
157 * Min peak height: threshold fro which on some signal is considered to be a peak. The actual peak is then determined as the maximum of the counts after the threshold
sendels 2.1 158 * pre and post peak integration time: how much ns to be integrated before and after the peak sample that are taken into account for the peak
159 * pre and post peak noise time: before and after the samples that are taken for the actual signal these samples are used as background ( they also can be used to define the "deadtime" of the detector before it searches for new peaks.
160
sndueste 12.1 161 \\
sendels 2.1 162
sndueste 12.1 163 [[~[~[image:url:http://hasfweb.desy.de/pub/Setup/MtcaAdc/pulse_energy_server.jpg~|~|alt="pulse_energy_server.jpg" height="400"~]~]>>attach:pulse_energy_server.jpg]] [[image:attach:image2019-11-18_17-9-7.png||height="400"]]
sndueste 11.1 164
sndueste 12.1 165 \\
sndueste 11.1 166
sndueste 12.1 167 jddd  server panel  Definition of the parameters
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sndueste 11.1 170
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sndueste 12.1 174
sndueste 13.1 175 = Detailed stuff =
176
177 * [[ADQ412 server description~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~|~|width="13" height="12"~]~]>>url:https://ttfinfo.desy.de/FLASHWiki/Wiki.jsp?page=SPdevicesDMA%20ADQ||shape="rect"]]
178 * [[ a collection of usefull things related to the OPIS ADCs>>doc:FLASH.OPIS ADC related things]]
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