Wiki source code of MTCA ADCs

Version 25.1 by sndueste on 2023/04/28 11:09

version	line-number	content
7.1	1	Content:
2.1	2
6.1	3
7.1	4
14.1	5	{{toc minLevel="2"/}}
6.1	6
8.1	7	----
	8
6.1	9	= Our ADC cards =
2.1	10
6.1	11	== GHz ADCs: SP-Devices ADQ412AC ==
2.1	12
	13	We have ADQ412AC-4G-MTCA digitizer cards for the experiment crates (Exp1, Exp2 and FL2Exp1):
4.1	14	[[ADQ412_datasheet.pdf>>attach:10-0494_C_ADQ412_datasheet.pdf]] ( [[new version>>attach:10-0494-adq412_datasheet.pdf]], [[sampling rates table>>attach:Clocking_AppNote.pdf]])
9.1	15	The cards are connected via Patch panels to the Experimental endstations and can be operated with a jddd panel:
2.1	16
9.1	17	[[image:attach:image2019-10-21_15-21-23.png\|\|width="800"]]
	18
2.1	19	\\
	20
9.1	21	\\
	22
4.1	23	* NOTE: between ADC and Patch panel we have installed an [[EMP protector>>attach:EMP_protector.pdf]] and an additional 1dB attenuator
2.1	24	* for the influence of the Patch cable and the EMP protector see also [[this logbook entry~[~[image:url:http://hasfweb.desy.de/pub/TWiki/TWikiDocGraphics/external-link.gif~\|~\|width="13" height="12"~]~]>>url:http://ttfinfo.desy.de/ExpHallelog/show.jsp?dir=/2016/27/08.07&pos=2016-07-08T17:41:07\|\|shape="rect"]]
	25
	26	\\
	27
3.1	28	(% class="wrapped" %)
2.1	29	\|(((
	30	Impedance AC
	31	)))\|(((
	32	50 OHM
	33	)))
	34	\|(((
	35	Input voltage range
	36	)))\|=(((
25.1	37	the complete range is about 1V for 4048 counts.
	38
	39	Thus +- 0.5 V for baseline at 0V
	40
	41	BUT the baseline can also be shifted ...
2.1	42	)))
	43	\|(((
	44	Digitizer resolution
	45	)))\|(((
	46	12 bit
	47	)))
	48
	49	4 CHANNELS MODE
	50
3.1	51	(% class="wrapped" %)
2.1	52	\|(((
	53	Sampling rate
	54	)))\|(((
10.1	55	2 *
2.1	56	)))\|(((
	57	GSPS
	58	)))
	59	\|(((
	60	Analog bandwidth
	61	)))\|(((
	62	2
	63	)))\|(((
	64	GHz
	65	)))
	66
	67	2 CHANNELS MODE
	68
3.1	69	(% class="wrapped" %)
2.1	70	\|(((
	71	Sampling rate
	72	)))\|(((
10.1	73	4 *
2.1	74	)))\|(((
	75	GSPS
	76	)))
	77	\|(((
	78	Analog bandwidth
	79	)))\|(((
	80	1.3
	81	)))\|(((
	82	GHz
	83	)))
	84
10.1	85	~* note that the sample rate is NOT locked to the FLASH repetition rate ! Thus there is a not integer number of samples between FLASH pulses. The sample rate also differs slightly from ADC card to ADC card. The rough spacing is 1993.846 samples between 2 pulses at 1 MHz for details ask the local contact.
	86
2.1	87	\\
	88
	89	===== ADC and DOOCS / DAQ =====
	90
	91	The HDF5 names for the ADC traces are depending on the beamline :
	92	\\PG Beamline:
	93	{{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH00/TD{{/code}}
	94	{{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH01/TD{{/code}}
	95	{{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH02/TD{{/code}}
	96	{{code language="none"}}/FL1/Experiment/PG/ADQ412 GHz ADC/CH03/TD{{/code}}
	97
	98	BL Beamlines:
	99	{{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH00/TD{{/code}}
	100	{{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH01/TD{{/code}}
	101	{{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH02/TD{{/code}}
	102	{{code language="none"}}/FL1/Experiment/BL1/ADQ412 GHz ADC/CH03/TD{{/code}}
	103	\\{{code language="none"}}/FL1/Experiment/BL2/ADQ412 GHz ADC/CH00/TD{{/code}}
	104	{{code language="none"}}/FL1/Experiment/BL2/ADQ412 GHz ADC/CH01/TD{{/code}}
	105	\\{{code language="none"}}/FL1/Experiment/BL3/ADQ412 GHz ADC/CH02/TD{{/code}}
	106	{{code language="none"}}/FL1/Experiment/BL3/ADQ412 GHz ADC/CH03/TD{{/code}}
	107
15.1	108	and at FLASH2
	109
	110
	111	\\\\\\\\{{code language="none"}}FL24:/FL2/Experiment/MTCA-EXP1/ADQ412 GHz ADC/CH00/TD/FL2/Experiment/MTCA-EXP1/ADQ412 GHz ADC/CH01/TD/FL2/Experiment/MTCA-EXP1/ADQ412 GHz ADC/CH02/TD/FL2/Experiment/MTCA-EXP1/ADQ412 GHz ADC/CH03/TD{{/code}}
	112
	113	\\
	114
2.1	115	DOOCS prop : {{code language="none"}}FLASH.FEL/ADC.ADQ.PG/EXP1.CH00/CH00.TD or CH00.DAQ.TD{{/code}}
16.1	116	here the {{code language="none"}}CH00.TD{{/code}} is the full ADC trace as it is sampled ( typically several 100.000 samples per pulse train) while the {{code language="none"}}CH00.DAQ.TD{{/code}} trace only has the number of samples which are sent to the DAQ OR if //grouping// is activated the {{code language="none"}}CH00.DAQ.TD{{/code}} contains only the grouped spectra. To read the ADC trace with an online analysis program the {{code language="none"}}CH00.DAQ.TD{{/code}} is preferable to use ...
2.1	117	DAQ channel: {{code language="none"}}FLASH.FEL/ADC.ADQ.PG/EXP1.CH00{{/code}}
	118
	119	in addition there are also additional parameters saved like:
	120
	121	* sample frequency (in MHz)
	122	* error (state)
	123	* offset
	124
	125	\\
	126
6.1	127	== Amplifiers for the GHZ ADCs ==
2.1	128
6.1	129	* we can offer [[ Phillips scientific Model 6954>>attach:6954ds.pdf]] amplifiers to either amplify small signals or to decouple setups which may deliver voltage peaks fro the ADCs.
	130	* The available ADCs 5x, 10x, 20 x 50x and 100x
	131	* The ADCs can be borrowed from Markus Braune
16.1	132	* The Amplifiers fit perfectly to the dynamic range of the GHz ADCs - here a [[ test of the Phillips scientific amplifier>>attach:Model_6954_Amplifier_Report.pdf]]
24.1	133	* There are also [[BiasTs>>attach:ZX85-12G-S+.pdf]] available that can be borrowed ([[link to internal page>>doc:FLASH.Bias T]])[[image:url:https://confluence.desy.de/download/attachments/177857419/20210414_161820.jpg?version=5&modificationDate=1618412745169&api=v2\|\|thumbnail="true" alt="20210414_161820.jpg" height="150"]]
6.1	134
	135	\\
	136
	137	== 108 MHz ADCs: Struck SIS8300-L2D ==
	138
2.1	139	There is one in each of the MTCAs in the hall: MTCA-EXP1 at PG/BL1, the other at BL2 and BL3.
	140
23.1	141	They are 16 bit, 10 channel, 125 MS/s ADCs. Here is a link to the [[Struck website>>url:https://www.struck.de/sis8900.html\|\|shape="rect"]]
2.1	142
	143	\\
	144
	145	50 Ohm input impedance, -1 V,...,+1 V default input range, analog signals can be routed to AC and DC input stage. The coupling is DC via op-amp (switching to AC transformer involves resoldering of SMD solder bridges).
	146
	147	Here is a trace of the first signal, a 1 MHz trigger connected from the x2timer board in the same MTCA:
	148
17.1	149	[[image:attach:adc_mhz.jpg\|\|height="400"]]
2.1	150
	151	\\
	152
6.1	153	== Pulse energy server: Using the Struck SIS8300-L2D to detect only integrated values of pulses ==
2.1	154
12.1	155	FS-LA (Falko Peters) programmed a pulse detection server that automatically detects peaks in the signal and integrates the samples around the peak.
2.1	156
12.1	157	Things to set:
	158
	159	* Min peak height: threshold fro which on some signal is considered to be a peak. The actual peak is then determined as the maximum of the counts after the threshold
2.1	160	* pre and post peak integration time: how much ns to be integrated before and after the peak sample that are taken into account for the peak
	161	* pre and post peak noise time: before and after the samples that are taken for the actual signal these samples are used as background ( they also can be used to define the "deadtime" of the detector before it searches for new peaks.
	162
12.1	163	\\
2.1	164
20.1	165
11.1	166
20.1	167	\\
17.1	168
20.1	169	[[image:attach:pulse_energy_server.jpg\|\|height="400"]] [[image:attach:image2019-11-18_17-9-7.png\|\|height="400"]]
	170
12.1	171	\\
11.1	172
12.1	173	jddd server panel Definition of the parameters
	174
2.1	175	\\
11.1	176
	177	\\
	178
	179	\\
12.1	180
21.1	181	== Detailed expert stuff ==
13.1	182
	183	* [[ a collection of usefull things related to the OPIS ADCs>>doc:FLASH.OPIS ADC related things]]
20.1	184	* a list of [[doc:FLASH.our MTCA ADC cards]] (only internal link)
13.1	185
12.1	186	\\
	187
	188	\\
13.1	189
	190	\\
	191
	192	\\
20.1	193
	194	\\

Wiki source code of MTCA ADCs

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