Changes for page Trigger Howto

Last modified by sndueste on 2023/07/07 11:28

From version 14.1
edited by grunewal
on 2019/12/06 13:59
Change comment: There is no comment for this version
To version 15.1
edited by sndueste
on 2020/01/21 12:57
Change comment: There is no comment for this version

Summary

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Author
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1 -XWiki.grunewal
1 +XWiki.sndueste
Content
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102 102  
103 103  \\
104 104  
105 -\\
106 -
107 107  = Set a constant frequency to a channel =
108 108  
109 109  =
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153 153  
154 154  \\
155 155  
154 +== General FLASH frequencies: ==
155 +
156 156  \\
157 157  
158 +(% class="relative-table" style="width: 17.2254%;" %)
159 +|(((
160 +(% style="color: rgb(0,0,255);" %)Name
161 +)))|(((
162 +(% style="color: rgb(0,0,255);" %)Frequency
163 +)))|(((
164 +(% style="color: rgb(0,0,255);" %)Divider
165 +)))
166 +|(((
167 +1.3 GHz
168 +)))|(((
169 +1300.000000 MHz
170 +)))|(((
158 158  \\
172 +)))
173 +|(((
174 +108 MHz
175 +)))|(((
176 +108.333333 MHz
177 +)))|(((
178 +12
179 +)))
180 +|(((
181 +9 MHz
182 +)))|(((
183 +9.02777777 MHz
184 +)))|(((
185 +144
186 +)))
187 +|(((
188 +4.5 MHz
189 +)))|(((
190 +4.513888 MHz
191 +)))|(((
192 +288
193 +)))
194 +|(((
195 +1 MHz
196 +)))|(((
197 +1.003086 MHz
198 +)))|(((
199 +1296
200 +)))
159 159  
160 160  \\
161 161  
162 162  Once a clock is configured with the right frequency one can choose in the "expert panel" of the according channel the "FPGA clock" in the "input source select"  chooser.
163 163  
164 -\\
165 -
166 -\\
167 -
168 -\\
169 -
170 170  One has to set the delay to values less than the repetition rate ... (so for 1 MHz between 0 and 990 µs)  and the trigger width also less than the rep rate ...
171 171  
172 -\\
208 +This results in a continuous train of pulses with the set trigger width.
173 173  
174 -\\
175 -
176 -\\
177 -
178 -This results in a continuous train of pulses with the set trigger width :
179 -
180 180  = Creating an (own) burst trigger =
181 181  
182 182  One can use now a SECOND trigger channel which is set to a regular 10 Hz trigger  and gate the clock output to create a burst with defined start point and length,